Author(s): Ramsey Issa, Said Hamad, Ricardo Grau-Crespo, Emad Awad, Taylor D. Sparks
When VM=1, the protected-mode bit goes low and the Entry PLA selects real-mode entry points -- MOV ES, reg takes the one-line path. Meanwhile, CPL is hardwired to 3 whenever VM=1, so the V86 task always runs at the lowest privilege level, under full paging protection. The OS can use paging to virtualize the 8086's 1 MB address space, even simulating A20 address line wraparound by mapping pages to the same physical frames.
，这一点在heLLoword翻译官方下载中也有详细论述
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Sometimes it takes a long time before I figure out what I actually want to write, and then everything falls into place:，更多细节参见91视频
"status": "Incomplete"，更多细节参见safew官方版本下载
{ antialias: true }：开启了抗锯齿，让边缘光滑，不再有毛刺。